Device Layer – IoT Heart

The device layer is where an IoT system meets the physical world: it senses conditions, decides or waits for a decision, and acts. Get this layer wrong and no amount of clever cloud analytics further up the stack will fix it. This page explains the main building blocks, what current hardware trends actually change for you, and what to check before you commit a device design.

What the device layer actually does

Every device layer design does three things, in a loop: it senses something about the physical world, processes that information (however briefly), and either acts on it directly or passes it up to the connectivity layer. The specifics vary hugely: a soil moisture sensor and an industrial robot arm are both “device layer,” but the design pressures are almost entirely different.

What stays constant is the set of trade-offs: power budget, physical environment, security, unit cost, and how long the device needs to keep working unattended. Decisions made here are hard to undo once a device ships, so it is worth getting the fundamentals right early.

Diagram of the four device layer building blocks: sensors (data in), actuators (action out), embedded compute (processing), and hardware security (trust).

Sensors: how devices sense the physical world

Sensors are the input side of the device layer. The common categories are:

Temperature and humidity, for environmental monitoring, HVAC and cold chain.
Motion and proximity, for security, robotics and occupancy detection.
Pressure and vibration, for industrial monitoring and predictive maintenance.
Light and sound, for smart lighting, noise monitoring and acoustic sensing.

Good sensor selection is less about raw accuracy and more about matching the sensor to the real operating environment: temperature range, humidity, vibration, and how the device will actually be mounted, not the datasheet’s ideal test conditions.

Actuators: how devices act on the physical world

Actuators are the output side: motors and relays for movement and switching, valves and pumps for fluid and gas control, and displays or indicators for feedback to a person nearby. The main design question is rarely “does it work?” but “does it fail safely?”: what the device does when it loses power, loses connectivity, or receives a conflicting command matters as much as the action itself.

Embedded compute: MCUs, edge AI and RISC-V

This is the part of the device layer that has changed the most in the last two to three years. A few things worth knowing if you are specifying hardware now:

Heterogeneous designs are now the default for anything doing on-device inference. Most 2026-era microcontroller designs pair a low-power control core, typically an Arm Cortex-M or a RISC-V core, with a small AI accelerator or DSP block, rather than relying on the control core alone (Promwad, 2026). NPU-equipped designs are the fastest-growing segment, though plain MCUs still lead most TinyML deployments by volume.

RISC-V has moved from experimental to mainstream in IoT silicon. Vendors have adopted it for the flexibility of an open, modular instruction set, lower licensing costs, and the ability to customise a core for a specific device rather than paying for capability they don’t need (RISC-V International, 2026).

On-device AI is past the demo stage. 2026 is broadly expected to be the point where OEMs move from pilot deployments to marketing entire product portfolios as edge-AI-enabled, with professional tooling now available rather than the conference-demo state of a few years ago (Shawn Hymel, 2026).

None of this means every device needs an AI accelerator. It means the option now exists at low power and reasonable cost where a few years ago it didn’t, so it is worth checking rather than assuming it’s out of reach.

Hardware security: built in, not bolted on

Security added after a device ships is expensive and often incomplete. The pattern that is becoming standard for 2026 designs combines a few specific elements: device-unique secrets derived in hardware, a certified secure element or crypto accelerator for cryptographic operations, and isolated execution for anything handling keys or credentials (GlobalSign, 2026).

PSA Certified gives a practical reference point: Level 3 certification covers resistance to hardware attacks such as side-channel and fault injection, and Level 4 (the highest tier) is now achievable in commercially available secure elements. If you are choosing a chip, checking its PSA Certified level is a faster way to compare security posture than reading marketing claims.

For smart home and consumer devices, the Matter protocol has its own security requirements built into onboarding: a commissioner must verify a device-specific passcode and check the device’s manufacturer credentials against a shared compliance ledger before it joins a network. If you’re building for the smart home market, factor Matter’s commissioning and credential requirements into your hardware design early, not as a late addition.

What to check before you commit

Power budget for the full operating life, not just active-mode current draw. Sleep current and wake frequency usually matter more than peak performance.
The actual physical environment, including temperature extremes, moisture, vibration and how the device will be mounted or enclosed, not just the datasheet’s test conditions.
Security level appropriate to the device, matched against a recognised reference such as PSA Certified, rather than an internal, unverifiable claim.
Update and maintenance path. How will firmware be updated once thousands of units are in the field, and what happens if an update fails partway through?
Unit cost at your actual production volume, since component pricing for AI accelerators and secure elements varies significantly with volume.

About this page

Written by Mark Searle, founder of IoT Heart and an IoT connectivity professional with more than 20 years’ experience across network engineering, solution architecture and commercial connected services. This page is based on publicly available industry data and standards documentation, current as of August 2026; hardware and semiconductor markets move quickly, so figures and component availability should be checked against current sources before a design decision.

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